CONCORDIA UNIVERSITY
Department of Electrical & Computer Engineering
COEN6741 - Computer Architecture & Design
Winter 2018
Instructor: Dr. S. Tahar
- Office: EV016.179
- Phone: 848-2424 ext. 3114
- Email: tahar@ece.concordia.ca
Lectures:
- Time: Thursdays -- 11:45-14:30
- Place: H-557
Office Hour: Mondays -- 13:30-14:30
Course Objectives: Hardware design issues of high performance
computer architectures.
Prerequisites: Basic knowledge in Computer organization, Digital
circuit design, High-level language programming, e.g. C or Java, and
Assembly programming, e.g. Intelx86 or MC680xx. Besides, knowledge of the
VHDL or Verilog HDL is required for the course project.
Textbook: "Computer Architecture: A Quantitative Approach"
(6th Ed.) by
John L. Hennessy and David A. Patterson, Elsevier, 2018.
ISBN: 978-0128119051.
Course Outline:
Fundamentals of Quantitative Design & Analysis (Chapter 1)
Instruction Set Principals (Appendix A)
Instruction Pipelining (Appendix C)
Mamory Hierarchy Design (Appendix B & Chapter 2)
Instruction-Level Parallelism (Chapter 3)
Data-Level Parallelism (Chapter 4)
Thread-Level Parallelism (Chapter 5)
Reference Books:
1. "Computer Organization and Design: The Hardware/Software Interface"
(5th Ed.) by David A. Patterson and John L. Hennessy, Elsevier, 2013.
ISBN: 978-0124077263
2. "Computer Organization and Architecture" (10th Ed.) by William
Stallings, Prentice Hall, 2015. ISBN: 978-0134101613.
Grading Scheme: Test 1: 30%, Test 2: 30%, and Project: 40%.
Course Web Page: http://www.ece.concordia.ca/~tahar/coen6741.html